Title :
Accumulate repeat accumulate codes
Author :
Abbasfar, Aliazam ; Divsalar, Dariush ; Kung Yao
Author_Institution :
University of California Los Angeles
fDate :
29 Nov.-3 Dec. 2004
Abstract :
We propose an innovative channel coding scheme called "accumulate repeat accumulate codes" (ARA). This class of codes can be viewed as serial turbo-like codes, or as a subclass of low density parity check (LDPC) codes, thus belief propagation can be used for iterative decoding of ARA codes on a graph. The structure of encoder for this class can be viewed as precoded repeat accumulate (RA) code or as precoded irregular repeat accumulate (IRA) code, where simply an accumulator is chosen as the precoder. Thus ARA codes have simple, and very fast encoder structure when they representing LDPC codes. Based on density evolution for LDPC codes through some examples for ARA codes, we show that for maximum variable node degree 5 a minimum bit SNR as low as 0.08 dB from channel capacity for rate 1/2 can be achieved as the block size goes to infinity. Thus based on fixed low maximum variable node degree, its threshold outperforms not only the RA and IRA codes but also the best known unstructured irregular LDPC codes with the same maximum node degree. Furthermore, by puncturing the accumulators, any desired high rate codes close to code rate 1 can be obtained with thresholds that stay close to the channel capacity thresholds uniformly. Iterative decoding simulation results are provided. The ARA codes also have projected graph or protograph representation, that allows for high speed decoder implementation.
Keywords :
channel capacity; channel coding; graph theory; iterative decoding; parity check codes; turbo codes; ARA; IRA codes; LDPC code subclass; RA codes; accumulate repeat accumulate codes; accumulator precoder; accumulator puncturing; belief propagation; block size; channel capacity; channel capacity thresholds; channel coding scheme; code density evolution; code rate; encoder structure; graph-based iterative decoding; high rate codes; high speed decoder implementation; iterative decoding simulation; low density parity check codes; maximum variable node degree; minimum bit SNR; precoded irregular repeat accumulate code; precoded repeat accumulate code; projected graph representation; serial turbo-like codes; unstructured irregular LDPC codes; Belief propagation; Channel capacity; Channel coding; Concatenated codes; H infinity control; Iterative decoding; Laboratories; Parity check codes; Propulsion; Turbo codes;
Conference_Titel :
Global Telecommunications Conference, 2004. GLOBECOM '04. IEEE
Print_ISBN :
0-7803-8794-5
DOI :
10.1109/GLOCOM.2004.1377999