DocumentCode :
423985
Title :
Architectural requirements for threshold logic gates based on resonant tunneling devices
Author :
Kelly, P.M. ; McGinnity, Thomas Martin ; Maguire, Liam P.
Author_Institution :
Intelligent Systems Engineering Laboratory, University of Ulster
Volume :
3
fYear :
2004
fDate :
25-29 July 2004
Firstpage :
1977
Abstract :
Threshold logic gates (TLGs) based on resonant tunneling diodes (RTDs) allow the implementation of simple McCulloch-Pitts (MCP) neuron models. Whilst they have been demonstrated implementing a wide range of binary logic circuits the gates are also theoretically capable of implementing artificial neural networks. The conventional operation of RTD based logic circuits with many cascaded stages has inherent disadvantages associated with the requirement of an evaluation period at each stage and the resultant use of multiple clocks. The authors propose that highly parallel structures similar to those found in artificial neural networks are better suited to RTD based TLGs and offer the way forward for future large scale designs.
Keywords :
logic gates; neural chips; neural net architecture; resonant tunnelling diodes; threshold logic; McCulloch-Pitts neuron models; architectural requirements; artificial neural networks; binary logic circuits; resonant tunneling devices; resonant tunneling diodes; threshold logic gates; Artificial neural networks; Clocks; Latches; Logic circuits; Logic design; Logic devices; Logic gates; Neurons; Resonant tunneling devices; Robustness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 2004. Proceedings. 2004 IEEE International Joint Conference on
ISSN :
1098-7576
Print_ISBN :
0-7803-8359-1
Type :
conf
DOI :
10.1109/IJCNN.2004.1380917
Filename :
1380917
Link To Document :
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