Title :
On interactions between routing and detailed placement
Author :
Jariwala, Devang ; Lillis, John
Author_Institution :
Dept. of Comput. Sci., Illinois Univ., Chicago, IL, USA
Abstract :
The main goal of This work is to develop deeper insights into viable placement-level optimization of routing. Two primary contributions are made. First, an experimental framework in which the viability of predictive models of routing congestion for optimization during detailed placement can be evaluated, is developed. The main criteria of consideration in these experiments is how (un)reliably various models from the literature detect routing hot-spots. We conclude that such models appear to be too unreliable for detailed placement optimization. Second, motivated by the first result, we present a unified combinatorial framework in which cell placement and exact routing structures are captured and optimized; the framework relies on the trunk-decomposition of global routing structures and optimization is performed by a generalized optimal interleaving algorithm (Hur and Lillis, 2000). A proof of concept implementation of this framework is studied in the FPGA domain. The technique can reduce the number of channels at maximum density by almost 45% on average with maximum reduction of 68% for optimized global routing.
Keywords :
circuit optimisation; field programmable gate arrays; integrated circuit layout; network routing; FPGA; cell placement; detailed placement optimization; generalized optimal interleaving algorithm; global routing structures; optimized global routing; routing congestion models; routing hot-spot detection; trunk-decomposition; viable placement-level optimization; Computer science; Design optimization; Digital systems; Field programmable gate arrays; Interleaved codes; Logic design; Predictive models; Routing; Simulated annealing; White spaces;
Conference_Titel :
Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on
Print_ISBN :
0-7803-8702-3
DOI :
10.1109/ICCAD.2004.1382606