DocumentCode
424394
Title
Delayed Line Bus Scheme: A Low-Power Bus Scheme for Coupled On-Chip Buses
Author
Ghoneima, Maged ; Ismail, Yousr
Author_Institution
Northwestern University, Evanston, IL
fYear
2004
fDate
11-11 Aug. 2004
Firstpage
66
Lastpage
69
Abstract
This paper presents a comprehensive qualitative and analytical analysis of the effect of relative delay on the dissipated energy of coupled lines. Closed form expressions modeling the effect of relative delay on the dissipated energy, and the Miller coupling factor, MCF, are also presented. Skewing the worst switching case is shown to provide up to 50% reduction in energy dissipation. This observation was implemented in a low-power bus scheme, DLBS, which leads to a power reduction of up to 25%.
Keywords
Buses; Coupling Capacitance; Interconnects; Low Power; Buses; Coupling Capacitance; Interconnects; Low Power;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on
Conference_Location
Newport Beach, CA, USA
Print_ISBN
1-58113-929-2
Type
conf
Filename
1382963
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