DocumentCode
424529
Title
A heuristic for peak power constrained design of network-on-chip (NoC) based multimode systems
Author
Bhojwani, Praveen ; Mahapatra, Rabi ; Kim, Eun Jung ; Chen, Thomas
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
2005
fDate
3-7 Jan. 2005
Firstpage
124
Lastpage
129
Abstract
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system components and routing of system communication affect system performance and power consumption. This research provides a heuristic to determine the neighborhood configuration for each component. By controlling the communication bandwidth allocation, simulation results with synthetic and real workloads indicate that our heuristic is able to control the peak power consumption, but at cost of throughput degradation.
Keywords
bandwidth allocation; integrated circuit interconnections; network routing; power consumption; system-on-chip; communication bandwidth allocation; heterogeneous system components; interconnections; multimode systems; neighborhood configuration; network-on-chip; peak power constrained design; power consumption; system communication routing; system performance; throughput degradation; Channel allocation; Communication system control; Costs; Degradation; Energy consumption; Network-on-a-chip; Power system interconnection; Routing; System performance; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2005. 18th International Conference on
ISSN
1063-9667
Print_ISBN
0-7695-2264-5
Type
conf
DOI
10.1109/ICVD.2005.12
Filename
1383264
Link To Document