DocumentCode
425618
Title
SPIN-SIM: logic and fault simulation for speed-independent circuits
Author
Shi, Feng ; Makris, Yiorgos
Author_Institution
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
fYear
2004
fDate
26-28 Oct. 2004
Firstpage
597
Lastpage
606
Abstract
We present SPIN-SIM, a logic and fault simulator for speed-independent circuits, that extends the classical Eichelberger´s method and overcomes its limitations. In order to improve simulation accuracy. SPIN-SIM adopts a 13-valued algebra, maintains the relative order of causal signal transitions, and unfolds time frames judiciously. In addition, complex gates are handled through replacement by pseudo-gate equivalents with regards to functionality, timing and faulty behavior. Experimental results show that SPIN-SIM incurs a negligible increase in computational time over Eichelberger´s method, yet is much more accurate and achieves a significant improvement in fault coverage.
Keywords
asynchronous circuits; fault simulation; logic simulation; 13-valued algebra; Eichelberger method; SPIN-SIM; fault coverage; fault simulation; logic simulation; pseudo gate equivalents; signal transitions; speed independent circuits; Asynchronous circuits; Circuit faults; Circuit simulation; Circuit testing; Clocks; Delay; Hazards; Logic circuits; Multivalued logic; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2004. Proceedings. ITC 2004. International
Print_ISBN
0-7803-8580-2
Type
conf
DOI
10.1109/TEST.2004.1386997
Filename
1386997
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