Title :
Security vs. test quality: are they mutually exclusive?
Abstract :
Scan technology does not provides controllability and observability in the IC, which could ease IP theft. Hence it is necessary not to eliminate scan chains but to add security to design-for-test (DFT) as a design constraint. Scan chains with decryption and encryption technology allow for scan chains to be used in security sensitive situations. Scan chains and hence high-quality test are implemented on ICs without compromising the IP on the chip.
Keywords :
cryptography; design for testability; integrated circuit testing; DFT; IP theft; decryption; design for testability; encryption; high quality testing; integrated circuit testing; scan chains; scan technology; Automatic test pattern generation; Circuit testing; Cryptography; Decoding; Encoding; Flip-flops; Information security; Logic design; Logic testing; Sequential analysis;
Conference_Titel :
Test Conference, 2004. Proceedings. ITC 2004. International
Print_ISBN :
0-7803-8580-2
DOI :
10.1109/TEST.2004.1387422
