DocumentCode :
425736
Title :
100 DPPM in nanometer technology... is it achievable?
Author :
Aldrich, Greg
Author_Institution :
Mentor Graphics Corp., Beaverton, OR, USA
fYear :
2004
fDate :
26-28 Oct. 2004
Firstpage :
1417
Abstract :
As process technologies move to 100nm and below, maintaining acceptable defect levels has become more difficult. This panel assembles a group of experts in the area of manufacturing and test for an open discussion on the challenges and solutions available for achieving 100 defective parts per million (DPPM) or better with nanometer design technologies.
Keywords :
integrated circuit design; nanotechnology; 100 nm; defect levels; defective parts per million; nanometer design technology; process technology; Assembly; Costs; Graphics; Instruments; Job shop scheduling; Large scale integration; Logic testing; Manufacturing; Process design; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2004. Proceedings. ITC 2004. International
Print_ISBN :
0-7803-8580-2
Type :
conf
DOI :
10.1109/TEST.2004.1387425
Filename :
1387425
Link To Document :
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