Title :
Maximizing system performance: using reconfigurability to monitor system communications
Author :
Shannon, Lesley ; Chow, Paul
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Abstract :
Commercial FPGA companies now provide tools that allow users to implement designs comprising soft-core processors and modules of dedicated logic. If a designer chooses to partition a system into multiple processors and hardware modules, tools and techniques for design analysis are necessary to understand system performance. This work introduces WOoDSTOCK, a tool that profiles system performance by adding monitors to the circuit running in real time on the chip. The user is able to generate a system specific profiler tailored to monitor the communication links between the different computing elements. This provides a macroscopic picture of system performance, which highlights the computing elements that cause bottlenecks in the design.
Keywords :
computerised monitoring; field programmable gate arrays; integrated circuit design; logic CAD; microprocessor chips; reconfigurable architectures; FPGA designs; WOoDSTOCK; circuit monitoring; communication links; computing elements; dedicated logic; design analysis; field programmable gate array; hardware modules; multiple processors; real time monitoring; soft-core processors; system communication monitoring; system partitioning; system performance profiling; system reconfigurability; Circuits; Field programmable gate arrays; Hardware; Logic design; Monitoring; Performance analysis; Process design; Real time systems; Reconfigurable logic; System performance;
Conference_Titel :
Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on
Print_ISBN :
0-7803-8651-5
DOI :
10.1109/FPT.2004.1393273
