DocumentCode :
4277
Title :
Analysis of Stability Degradation of SRAMs Using a Physics-Based PBTI Model
Author :
Chih-Hsiang Ho ; Hassan, Mohammad Kamrul ; Soo Youn Kim ; Roy, Kaushik
Author_Institution :
Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume :
35
Issue :
9
fYear :
2014
fDate :
Sept. 2014
Firstpage :
951
Lastpage :
953
Abstract :
For the static random access memories (SRAMs) with high-k/metal gate transistors, positive bias temperature instability (PBTI)-induced stability degradation can be significant. In this letter, we analyze the temporal variations of the READ/WRITE operations and static noise margin of a conventional 6T-SRAM cell using a physics-based PBTI model. We show that the dependence of BTI effects on intrinsic variations and the design parameters of SRAM are significant A 10 mV increase in intrinsic variations can lead to double the BTI-induced read failure rate. Furthermore, SRAM is more sensitive to PBTI effects as compared with negative bias temperature instability These results validate that stochastic modeling of PBTI is required for reliable SRAM design.
Keywords :
SRAM chips; high-k dielectric thin films; integrated circuit design; physics; 6T-SRAM cell; design parameters; high-k-metal gate transistors; induced read failure rate; intrinsic variations; negative bias temperature instability; physics-based PBTI model; positive bias temperature instability; read-write operations; stability degradation; static random access memories; stochastic modeling; temporal variations; voltage 10 mV; Degradation; Logic gates; MOSFET circuits; Random access memory; Stability analysis; Thermal stability; Transistors; Static random access memory (SRAM); negative bias temperature instability (NBTI); positive bias temperature instability (PBTI); static noise margin (SNM);
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2014.2340373
Filename :
6868239
Link To Document :
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