Title :
Crosstalk-insensitive layout generation using artificial neural networks
Author :
Ilumoka, A. ; Chen, Tsai
Author_Institution :
Dept. of Electr. & Comput. Eng., Hartford Univ., West Hartford, CT, USA
Abstract :
Crosstalk minimization is carried out on equivalent circuit models of interconnect layout using gradient-based optimization. Optimized SPICE parameters are then used to generate crosstalk-insensitive layouts by use of neural networks. Results obtained - verified by MOSIS fabrication - indicate that crosstalk noise reduction of up to 60% can be achieved with relatively small adjustments to interconnect layout geometry.
Keywords :
SPICE; circuit optimisation; crosstalk; gradient methods; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; integrated circuit noise; neural nets; MOSIS fabrication; SPICE parameters; artificial neural networks; crosstalk insensitive layout generation; crosstalk minimization; crosstalk noise reduction; gradient based optimization; integrated circuit interconnect layout; integrated circuit models; interconnect layout geometry; Artificial neural networks; Crosstalk; Electromagnetic modeling; Equivalent circuits; Fabrication; Geometry; Integrated circuit interconnections; Minimization; Neural networks; SPICE;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2004. IEEE 13th Topical Meeting on
Print_ISBN :
0-7803-8667-1
DOI :
10.1109/EPEP.2004.1407617
