DocumentCode
430637
Title
Booth memoryless modular multiplier with signed-digit number representation
Author
Chen, Shuangching ; Wei, Shugang ; Shimizu, Kensuke
Author_Institution
Dept. of Comput. Sci., Gunma Univ., Kiryu Gunma, Japan
Volume
1
fYear
2004
fDate
6-9 Dec. 2004
Firstpage
21
Abstract
We present new Booth modular multipliers with a signed-digit number representation. The proposed Booth algorithm can recode the multiplier in which every two-digit has an element of the set {-2, -1, 0, 1, 2}. In a serial modular multiplier, the proposed Booth modular multipliers compared to earlier ones offer savings up 50 percent in the execution time. In a parallel multiplier, it can be up to 18.76 percent in the implementation area for modulus m = 255.
Keywords
digital arithmetic; memoryless systems; multiplying circuits; Booth algorithm; Booth memoryless modular multiplier; multiplier recoding; parallel multiplier; serial multiplier; signed-digit number representation; Algorithm design and analysis; Arithmetic; Computer science; Equations;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN
0-7803-8660-4
Type
conf
DOI
10.1109/APCCAS.2004.1412681
Filename
1412681
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