DocumentCode
430675
Title
Low power correlator of DSP core for communication system
Author
Tsao, Ya-Lan ; Teng, Jun-Xian ; Lin, MawChing ; Jou, Shyh-Jye
Author_Institution
Dept. of Electr. Eng., Nat. Central Univ., Chungli, Taiwan
Volume
1
fYear
2004
fDate
6-9 Dec. 2004
Firstpage
217
Abstract
The correlator is the most demanded block in a communication systems. In this work, low power correlator block is implemented into an embedded DSP core as a special block. This special block of correlator can employ data bus bandwidth of DSP efficiently. The design results show that it use only 3235 gate counts and can reduce the correlation operations from 20 instructions (without correlator) to only 4 instructions.
Keywords
code division multiple access; correlation methods; correlators; digital signal processing chips; embedded systems; low-power electronics; signal processing; communication system; communication systems; correlation operations; data bus bandwidth; embedded DSP core; low power correlator; special correlator block; Bandwidth; Clocks; Coprocessors; Correlators; Digital signal processing; Matched filters; Multiaccess communication; Power engineering and energy; Transceivers; Transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN
0-7803-8660-4
Type
conf
DOI
10.1109/APCCAS.2004.1412731
Filename
1412731
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