• DocumentCode
    430687
  • Title

    A 1 V 1.1 GHz CMOS integrated receiver front-end

  • Author

    Cheng, Wang-Chi ; Chan, Cheong-Fat ; Pun, Kong-Pang ; Choy, Chiu-Sing

  • Author_Institution
    Dept. of Electron. Eng., Hong Kong Chinese Univ.
  • Volume
    1
  • fYear
    2004
  • fDate
    6-9 Dec. 2004
  • Firstpage
    325
  • Abstract
    This paper describes the design of a 1 V 1.1 GHz CMOS integrated receiver front-end. The receiver consists of a transconductance low noise amplifier (LNA) and a current mode down conversion mixer powered by a 1 V supply. The receiver was fabricated and measured using an AMSreg 0.35 mum CMOS technology. The total measured noise figure is equal to 11.77 dB and the input-referred third-order intercept point (IIP3) is equal to 2 dBm. Moreover, the overall power gain of the receiver is equal to 7 dB
  • Keywords
    CMOS integrated circuits; mixers (circuits); operational amplifiers; radio receivers; 0.35 micron; 1 V; 1.1 GHz; 11.77 dB; 7 dB; CMOS integrated receiver front-end; LNA; current mode down conversion mixer; receiver fabrication; transconductance low noise amplifier; CMOS technology; Capacitors; Circuits; Inductors; Low-noise amplifiers; Noise figure; Radio frequency; Radiofrequency amplifiers; Transconductance; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
  • Conference_Location
    Tainan
  • Print_ISBN
    0-7803-8660-4
  • Type

    conf

  • DOI
    10.1109/APCCAS.2004.1412760
  • Filename
    1412760
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=430687