DTA: layout design tool for CMOS analog circuit

Author

Lai, Yen-Tai ; Jiang, Yung-Chuan ; Kao, Chi-Chou

Author_Institution

Dept. of Electr. Eng., National Cheng Kung Univ., Tainan

Volume

1

fYear

2004

fDate

6-9 Dec. 2004

Firstpage

537

Abstract

Layout is an important step in analog IC design. This paper presents an automation design of analog circuit layout by matching of devices and reducing noise coupling to decrease noise sensitivity. We first avoid the mismatch of constructing devices. Then, all devices are placed according to the wire length and area constraints. Finally, an effective approach is proposed to reduce noise coupling in the routing step. We have implemented our design method in several CMOS analog circuits. It can be seen that the proposed method can generate good analog circuit layout with specified timing constraints

Keywords

CMOS analogue integrated circuits; circuit layout CAD; integrated circuit design; CMOS analog circuit; DTA; analog IC design; analog circuit layout; area constraints; automation design; layout design tool; noise coupling; noise sensitivity; routing step; timing constraints; wire length; Analog circuits; Analog integrated circuits; CMOS analog integrated circuits; Circuit noise; Coupling circuits; Design automation; Integrated circuit layout; Integrated circuit noise; Noise reduction; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on

Conference_Location

Tainan

Print_ISBN

0-7803-8660-4

Type

conf

DOI

10.1109/APCCAS.2004.1412817

Filename

1412817