DocumentCode :
430831
Title :
Schedule method for efficient memory addressing
Author :
Kaneko, Yuhei ; Sugino, Nobuhiko ; Nishihara, Akinori
Author_Institution :
Dept. of Inf. Process., Tokyo Inst. of Technol., Yokohama, Japan
Volume :
A
fYear :
2004
fDate :
21-24 Nov. 2004
Firstpage :
17
Abstract :
Memory address allocation method for DSPs of indirect addressing with indexed auto-modification is proposed. At first, address auto-modification amounts for a given program are analyzed. And then address allocation of program variables are moved and shifted, so that both indexed and simple auto-modifications are effectively exploited. For further reduction in overhead codes, memory address allocation method coupled with computational reordering is proposed. The proposed methods are applied to the existing compiler, and generated codes prove their effectiveness.
Keywords :
digital signal processing chips; processor scheduling; storage allocation; DSP; address automodification; computational reordering; indexed automodification; memory address allocation method; memory addressing; overhead codes reduction; schedule method; Arithmetic; Costs; Digital signal processing; Digital signal processors; Hardware; High level languages; Information processing; Registers; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2004. 2004 IEEE Region 10 Conference
Print_ISBN :
0-7803-8560-8
Type :
conf
DOI :
10.1109/TENCON.2004.1414345
Filename :
1414345
Link To Document :
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