Title :
Unified architectures for computing DCT/DST/MDCT and their inverses
Author :
Ramana, M. Venkata ; Ray, Baijayanta ; Chakrabarti, Saswat
Author_Institution :
Dept. of E&ECE, IIT, Kharagpur, India
Abstract :
This paper proposes a unified architecture for computation of different Type I/II/III/TV discrete cosine/sine transforms (DCT/DST), modified discrete cosine transform (MDCT) and their inverses. Two methods are described, a parallel one suitable for any length of transform (N) value from 2 to 1024 and a serial one, that uses only one CORDIC up to a maximum length of 32.
Keywords :
digital arithmetic; discrete cosine transforms; parallel architectures; signal processing; CORDIC; DCT; discrete cosine transforms; discrete sine transforms; modified discrete cosine transform; unified architecture; Audio coding; Computer architecture; Concurrent computing; Data compression; Digital audio players; Discrete cosine transforms; Discrete transforms; Hardware; MPEG 4 Standard; Telecommunication computing;
Conference_Titel :
TENCON 2004. 2004 IEEE Region 10 Conference
Print_ISBN :
0-7803-8560-8
DOI :
10.1109/TENCON.2004.1414351
