DocumentCode :
433165
Title :
Design flexibility using FPGA dynamical reconfiguration
Author :
Abel, N. ; Kessal, L. ; Demigny, D.
Author_Institution :
Cergy-Pontoise Univ., ENSEA, France
Volume :
4
fYear :
2004
fDate :
24-27 Oct. 2004
Firstpage :
2821
Abstract :
In this paper, we detail the implementation of an image processing algorithm on the dynamically reconfigurable architecture ARDOISE. Beyond the complexity of this algorithm, we pay our attention on the possibilities offered by dynamic reconfiguration paradigm. We insist particularly on the software management of reconfigurations and on the flexibility it leads. We spread these concepts, tested practically on ARDOISE, in more complex cases which will be the object of future studies.
Keywords :
field programmable gate arrays; image segmentation; software management; ARDOISE; FPGA dynamical reconfiguration; design flexibility; field programmable gate array; image processing algorithm; software management; Computer architecture; Costs; Field programmable gate arrays; Filling; Hardware; Heuristic algorithms; Image segmentation; Runtime; Scheduling algorithm; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Image Processing, 2004. ICIP '04. 2004 International Conference on
ISSN :
1522-4880
Print_ISBN :
0-7803-8554-3
Type :
conf
DOI :
10.1109/ICIP.2004.1421691
Filename :
1421691
Link To Document :
بازگشت