DocumentCode :
43423
Title :
Influence of Package Trace Properties on CDM Stress
Author :
Di Sarro, James P. ; Reynolds, Bill ; Gauthier, R.
Author_Institution :
Semicond. R&D Center (SRDC), IBM, Essex Junction, VT, USA
Volume :
14
Issue :
3
fYear :
2014
fDate :
Sept. 2014
Firstpage :
810
Lastpage :
817
Abstract :
CDM current waveform properties show a strong dependence on pin type and location due to package transmission line effects in large BGAs. I/O pin waveforms have a depressed peak, slower rise time, and increased pulsewidth compared to power supply waveforms, with the offset increasing with the distance from the package center. Simulations illustrate that the internal current through the ESD protection network on the die can deviate significantly from the external current observed in the CDM system for long package traces.
Keywords :
ball grid arrays; electrostatic discharge; BGA; CDM current waveform properties; CDM stress; ESD protection network; I-O pin waveforms; depressed peak; internal current; long-package traces; package center; package trace properties; package transmission line effects; pin type; power supply waveforms; pulsewidth; rise time; Capacitance; Current measurement; Electrostatic discharges; Integrated circuit modeling; Pins; Power transmission lines; Transmission line measurements; CMOS integrated circuits (ICs); charged device model (CDM); electrostatic discharge (ESD);
fLanguage :
English
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
1530-4388
Type :
jour
DOI :
10.1109/TDMR.2014.2329552
Filename :
6827938
Link To Document :
بازگشت