DocumentCode
434372
Title
An EMC design risk assessment technique to retest or not to retest?
Author
O´Hara, Martin
Author_Institution
Telematica Syst. Ltd., Trafficmaster UK, Beds
Volume
1
fYear
2003
fDate
16-16 May 2003
Firstpage
123
Abstract
A technique is presented that provides for a qualitative and quantitative assessment of the risk of failing to achieve EMC compliance when making minor hardware design changes (component or PCB layout) on a product that has already had a successful compliance test performed. The EMC design risk assessment (EDRA) technique uses a simple summation of risk scheme to allow design changes to be gauged and the requirement for re-testing to be implied from the total risk value. The technique allows a product supplier to make a quantified technical assessment of the impact of design changes on the compliance status and hence decide if a retest is required or can be avoided. The supplier may make the decision to not implement all of the suggested design changes in order to avoid retest costs and the EDRA may be used to determine which changes are not economically feasible
Keywords
design for testability; electromagnetic compatibility; printed circuits; product design; risk management; EMC compliance; EMC design risk assessment technique; PCB layout; compliance test; hardware design changes; product design; product retesting; qualitative assessment; quantitative assessment; technical assessment; technical construction file; Automotive engineering; Circuits; Costs; Electromagnetic compatibility; Electrostatic discharge; Hardware; Immunity testing; Performance evaluation; Resistors; Risk management;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility, 2003. EMC '03. 2003 IEEE International Symposium on
Conference_Location
Istanbul
Print_ISBN
0-7803-7779-6
Type
conf
DOI
10.1109/ICSMC2.2003.1428210
Filename
1428210
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