DocumentCode :
434526
Title :
Pareto-optimal hardware for substitution boxes
Author :
Nedjah, Nadia ; de Macedo Mourelle, Luiza
Author_Institution :
Dept. of Electron. Eng. & Telecommun.,, State Univ. of Rio de Janeiro, Brazil
Volume :
1
fYear :
2005
fDate :
4-6 April 2005
Firstpage :
614
Abstract :
In this paper, we propose a methodology based on genetic programming to automatically generate hardware designs of substitution boxes necessary for many cryptosystems such as DES encryption system. We aim at evolving minimal hardware specifications, which minimize both space (i.e. required gate number), response time (i.e. encryption and decryption time) and dissipated power. We compare our results against existing and well-known designs, which were produced by human designers using conventional methods.
Keywords :
Pareto optimisation; cryptography; genetic algorithms; minimisation; DES encryption system; Pareto optimal hardware; cryptosystems; decryption; gate number; genetic programming; hardware design generation; hardware specification; power dissipation; response time; space minimization; substitution boxes; Cryptography; Delay; Design engineering; Genetic engineering; Genetic programming; Hardware; Humans; Resists; Systems engineering and theory; Telecommunication computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Technology: Coding and Computing, 2005. ITCC 2005. International Conference on
Print_ISBN :
0-7695-2315-3
Type :
conf
DOI :
10.1109/ITCC.2005.224
Filename :
1428531
Link To Document :
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