Title :
Switched current integrator for second order sigma delta modulator
Author :
Khitouni, Nizar ; Boujelben, Sonia ; Masmoudi, Mohamed
Author_Institution :
Dept. of Electr. Eng., Nat. Sch. Eng. of Sfax, Tunisia
Abstract :
In this paper, we present a switched current integrator S21 regulated cascade memory cell techniques for the second order sigma-delta modulator. A structure of offset compensation is used. The simulation result in this layout and in this transistor level is compared. A switched-current integrator is designed with a 0.35 μm CMOS process with a 2.5 V power supply. The average low power consumption is 1.25 mW.
Keywords :
CMOS memory circuits; circuit simulation; integrated circuit layout; integrating circuits; modulators; power consumption; sigma-delta modulation; switched current circuits; 0.35 micron; 1.25 mW; 2.5 V; CMOS process; S21 switched current integrator; cascade memory cell technique; circuit simulation; integrated circuit layout; low power consumption; offset compensation; second order sigma delta modulator; CMOS technology; Clocks; Delta modulation; Delta-sigma modulation; Equations; Frequency; Impedance; Integrated circuit technology; MOSFETs; Switching circuits;
Conference_Titel :
Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on
Print_ISBN :
0-7803-8656-6
DOI :
10.1109/ICM.2004.1434735
