Characterization and modeling of waffle MOSFETs for high frequency applications

Author

Wu, Wen ; Lam, Sang ; Ko, Ping K. ; Chan, Mansun

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China

Volume

1

fYear

2004

fDate

18-21 Oct. 2004

Firstpage

163

Abstract

The high frequency characteristics of waffle MOSFETs are studied. In addition to area saving and reduction of junction capacitance, enhancement on RF characteristics and extra flexibility in the design window are also provided by waffle MOSFETs. The waffle layout has been applied to MOSFETs fabricated using a 0.35-μm CMOS bulk technology and compared with those designed with conventional multi-finger layouts. The waffle MOSFET offers about 50% reduction in the gate resistance, 30%-50% enhancement in f_max and 15% improvement on linearity (IIP3). With the validity of small-signal model demonstrated by the good matching between the model prediction and the measured S-parameter data, it indicates that the waffle MOSFET is capable of offering RF performance improvement with careful design.

Keywords

MOSFET; S-parameters; circuit layout; semiconductor device models; 0.35 micron; CMOS bulk technology; S-parameter; area saving; gate resistance; high frequency applications; junction capacitance reduction; multi-finger layout; performance improvement; small-signal model; waffle MOSFET; waffle layout; CMOS technology; Capacitance; Fingers; Gallium arsenide; MOSFETs; Predictive models; Radio frequency; Scattering parameters; Semiconductor device modeling; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on

Print_ISBN

0-7803-8511-X

Type

conf

DOI

10.1109/ICSICT.2004.1434977

Filename

1434977