Design considerations of ultra-thin body SOI MOSFETs

In this work, the speed performance and static power dissipation of the ultra-thin body (UTB) MOSFET are comprehensively investigated, with both DC and AC behaviors considered for the first time. The insightful results show that it is unadvisable to decrease the silicon body thickness continually to achieve better short channel performance with silicon film thickness below 8 nm. Source/drain extension width (lsp) and silicon film thickness (tsi) are two independent parameters to influence the speed and static power dissipation of UTB SOI MOSFET respectively, which can result in great design flexibility. The optimal design regions of the silicon body thickness (tsi) and source/drain extension width (lsp) for LOP (low operating power) and HP (high-performance logic) applications are given respectively, which shed light on UTB SOI MOSFET design. For the first time, based on the different impact of physical and geometric parameters on device characteristics, a method to alleviate the contradiction between power and speed of UTB SOI MOSFET is proposed.