DocumentCode
435805
Title
Challenges of DRAM and flash scaling - potentials in advanced emerging memory devices
Author
Tran, Luan C.
Author_Institution
Micron Technol. Inc., Boise, ID, USA
Volume
1
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
668
Abstract
Dynamic random access memory (DRAM) and Flash nonvolatile memory (NVM) continue lo be scaled down to sub-90nm dimensions, a trend expected to extend through the next few generations. Difficulties, however, arise in both device and process technology for sub-65nm geometries in both types of memory. This paper analyzes these challenges and presents emerging device candidates with their potentials for high volume realization and opportunities for research and development in this area.
Keywords
DRAM chips; flash memories; nanotechnology; DRAM; Flash nonvolatile memory; dynamic random access memory; flash scaling-potentials; high-k dielectrics; memory devices; nanocrystal; process technology; Ambient intelligence; Capacitors; EPROM; Geometry; High K dielectric materials; Nonvolatile memory; Random access memory; Read only memory; Scanning electron microscopy; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1435093
Filename
1435093
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