• DocumentCode
    435813
  • Title

    A novel single poly EEPROM cell structure on thin oxide tunnel technology

  • Author

    Ren, Tao ; Pan, Liyang ; Liu, Zhihong ; Zhu, Jun

  • Author_Institution
    Inst. of Microelectron., Tsinghua Univ., Beijing, China
  • Volume
    1
  • fYear
    2004
  • fDate
    18-21 Oct. 2004
  • Firstpage
    711
  • Abstract
    This paper presents a single poly EEPROM cell structure on thin oxide tunnel technology. It consists of adjacently placed burial N+ diffusion capacitance and single poly EEPROM transistor which has a thin oxide tunnel (about 90 Å). The common poly of the stack capacitance and the transistor works as a "floating gate". The burial N+ diffusion of capacitance as "control node (gate)", Test chips which were fabricated in a 1.2 μm/150 Å single poly process showed 4-9 V of threshold voltage shift and more than 100,000 cycles of endurance. This EEPROM cell can be easily integrated with CMOS digital and analog circuits.
  • Keywords
    CMOS integrated circuits; EPROM; tunnelling; 4 to 9 V; CMOS analog circuits; CMOS digital circuit; EEPROM transistor; diffusion capacitance; single poly EEPROM cell; stack capacitance; thin oxide tunnel technology; CMOS analog integrated circuits; CMOS digital integrated circuits; Capacitance; Circuit testing; EPROM; Low voltage; Microelectronics; Threshold voltage; Tunneling; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
  • Print_ISBN
    0-7803-8511-X
  • Type

    conf

  • DOI
    10.1109/ICSICT.2004.1435102
  • Filename
    1435102