A fast variable-length decoder with optimized lookup tables on FPGA [MPEG applications]

Author

Guanghua, Chen ; Shiwei, Ma ; Min, Li ; Jialin, Cao ; Shao Yong

Author_Institution

Sch. of Mech. & Electron. Eng. & Autom., Shanghai Univ., China

Volume

3

fYear

2004

fDate

18-21 Oct. 2004

Firstpage

1649

Abstract

A novel high performance variable-length code (VLC) decoder for MPEG applications is proposed. It has higher throughput and requires smaller memory resources by group matching and lookup table optimization. Group matching is developed to simplify matching procedure and reduce the process time. Group recombination, group decomposition and group properties are applied to optimize the lookup tables, which removes the redundant bits and reduces the implementation complexity. This decoder is implemented on FPGA and the throughput is about 55 Msymbols/s at 55 MHz clock rate.

Keywords

field programmable gate arrays; table lookup; variable length codes; video coding; 55 MHz; FPGA; MPEG; VLC; group decomposition; group matching; group properties; group recombination; lookup table optimization; redundant bit removal; throughput; variable-length decoder; Automation; Clocks; Data compression; Decoding; Detectors; Field programmable gate arrays; Table lookup; Throughput; Transform coding; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on

Print_ISBN

0-7803-8511-X

Type

conf

DOI

10.1109/ICSICT.2004.1435147

Filename

1435147