DocumentCode
435918
Title
An efficient algorithm for 3-D interconnect capacitance extraction considering the floating dummy-fills
Author
Yu, Wenjian ; Zhang, Mengsheng ; Wang, Zeyi
Author_Institution
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume
2
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
1038
Abstract
The insertion of dummy metals is necessary to reduce the pattern-dependent variations of the dielectric thickness in the CMP process. This makes conventional tools of capacitance extraction exhibit prohibitive calculation time. This paper presents an efficient method for 3D capacitance extraction with taking the floating dummies into account. Based on the QMM-accelerated BEM, our method inherits high computational speed while considering the floating conditions and using a new preconditioner. For some typical structures including floating dummies, our method shows high accuracy and over 1000x speed-up over Raphael, about 10x speed-up over the method in the work of J.-K. Park et al. (2000).
Keywords
boundary-elements methods; capacitance; chemical mechanical polishing; integrated circuit interconnections; 3D interconnect capacitance extraction; CMP; QMM-accelerated BEM; dielectric thickness; dummy metals; floating dummy-fills; pattern-dependent variations; Computer science; Conductors; Dielectrics; Electric variables; Electrodes; Equations; Finite difference methods; Integrated circuit interconnections; Parasitic capacitance; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1436683
Filename
1436683
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