An analytical high frequency noise model for hot-carrier stressed MOSFETs

This paper proposes a hot-carrier stressed high frequency noise model for MOSFETs. By analytical method, a new fresh and post-stress high-frequency MOSFET noise model is developed, this model incorporates the effects of gate resistance, gate-induced current noise and nonlocal channel carrier heating, it can be used to calculate the minimum noise figure F_run, optimized source admittance Y_opt, and equivalent noise resistance R_n and admittance G_i. Within this model, the effects of hot-carrier stress induced interface states on the high-frequency noise performance can be evaluated. Modeling shows agreement with the measured data.