Design of CMOS high speed self-regulating VCO using negative skewed delay scheme

Author

Yan, Ge ; Zhongjian, Chen ; Wennan, Fen ; Lijiu, Ji

Author_Institution

Inst. of Microelectron., Peking Univ., Beijing, China

Volume

2

fYear

2004

fDate

18-21 Oct. 2004

Firstpage

1333

Abstract

Design of CMOS high-speed self-regulating voltage-controlled oscillator (HSSR VCO) using negative skewed delay scheme is presented in this paper. With a SMIC standard logic 0.18-μ 1.8V CMOS process, the simulation results show that the HSSR VCO can work at 2.2 GHz with good linearity in frequency-voltage space as over an acceptable tuning range as well as a built-in compensation for the delay variation caused by supply fluctuation.

Keywords

CMOS integrated circuits; UHF oscillators; integrated circuit design; voltage-controlled oscillators; 0.18 micron; 1.8 V; 2.2 GHz; CMOS integrated circuit; HSSR VCO; SMIC standard logic; delay variation compensation; frequency-voltage space; high speed self-regulating VCO; negative skewed delay scheme; tuning range; voltage-controlled oscillators; CMOS logic circuits; CMOS process; Circuit noise; Circuit optimization; Delay; Fluctuations; Frequency synthesizers; Microelectronics; Ring oscillators; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on

Print_ISBN

0-7803-8511-X

Type

conf

DOI

10.1109/ICSICT.2004.1436799

Filename

1436799