An embedded CMOS voltage reference IP core

This paper presents an experimental case study of the embedded CMOS analog IP core for SOC applications. Based on the research and analysis of embedded analog IP cores characteristic and design spec, the embedded voltage reference IP core is implemented by adopting high speed self bias amplifier and sub-threshold characteristic of MOSFET. The core have the advantages of temperature compensation and width supply source voltage, and the output voltage of reference can be flexibly changed by adjusting resistor. The IP core was implemented by TSMC 0.35 μm, 0.25 μm and 0.18 μm CMOS technology. The measured results show that the temperature coefficient less than 15ppm/K and the power current less than 5.2 A. Finally, the design methodology of embedded CMOS analog IP core is summarized.