DocumentCode
436002
Title
A CMOS charge pump with a novel structure in PLL
Author
Tao, Zhang ; Xuecheng, Zou ; Xubang, Shen
Author_Institution
Inst. of Pattern Recognition & Artificial Intelligence, Huazhong Sci. & Technol. Univ., Wuhan, China
Volume
2
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
1555
Abstract
A novel structure for a charge pump circuit is proposed, in which the current follow technology is used to make perfect current matching characteristics, and two differential inverters are implanted to increase the speed of charge pump. Simulation results, with 1st silicon 0.25μm 2.5V CMOS mixed signal process, show the good current matching characteristics regardless of the charge pump output voltages.
Keywords
CMOS integrated circuits; mixed analogue-digital integrated circuits; phase locked loops; 0.25 micron; 2.5 V; CMOS charge pump; CMOS mixed signal process; differential inverter; phase locked loop; CMOS technology; Charge pumps; Circuits; Clocks; Filters; Phase frequency detector; Phase locked loops; Switches; Voltage; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1436914
Filename
1436914
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