DocumentCode
436910
Title
The WarpIV simulation kernel
Author
Steinman, Jeffrey S.
Author_Institution
RAM Lab. Inc., San Diego, CA, USA
fYear
2005
fDate
1-3 June 2005
Firstpage
161
Lastpage
170
Abstract
This paper provides an overview of the WarpIV simulation kernel that was designed to be an initial implementation of the standard simulation architecture (SSA). WarpIV is the next generation replacement for the synchronous parallel environment for emulation and discrete event simulation (SPEEDES) framework that has supported a number of DoD simulation programs including MDWAR, EADTB, JSIMS, and others. This paper first provides a look back at the historical evolution of SPEEDES, the evolution of the SSA, and the development of WarpIV. This historical background is followed by a description of the layered SSA and design of WarpIV. Capabilities and new algorithms or data structures provided by each layer of the architecture are mentioned, but are not described in full detail. Several benchmarks for the underlying communications infrastructure and internal event-processing engine are given. The summary and conclusions section highlights the main technical points of the paper and describes future research and development goals for WarpIV.
Keywords
benchmark testing; operating system kernels; parallel processing; time warp simulation; DoD simulation program; WarpIV simulation kernel; data structure; discrete event simulation; event-processing engine; standard simulation architecture; synchronous parallel environment; Data structures; Discrete event simulation; Emulation; Engines; Job shop scheduling; Kernel; Laboratories; Predictive models; Research and development; Time warp simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Principles of Advanced and Distributed Simulation, 2005. PADS 2005. Workshop on
ISSN
1087-4097
Print_ISBN
0-7695-2383-8
Type
conf
DOI
10.1109/PADS.2005.32
Filename
1443321
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