DocumentCode :
437122
Title :
Coordination of design issues in the intermediate bus architecture
Author :
Huang, Hong
Author_Institution :
Astec Power of Emerson Network Power, Andover, MA
Volume :
1
fYear :
2005
fDate :
6-10 March 2005
Firstpage :
169
Abstract :
Coordination issues for design and operation, not clearly and systematically addressed so far, are presented in this paper for distributed power architecture using intermediate bus architecture. Fundamental coordination conditions are presented in accordance with (a) power, voltage, and current, (b) switching frequencies, (c) input/output impedance decoupling and (d) thermal derating
Keywords :
design engineering; power convertors; system buses; current; distributed power architecture; input/output impedance decoupling; intermediate bus architecture; switching frequency; thermal derating; voltage; Costs; Energy management; Guidelines; Impedance; Intelligent networks; Power conversion; Switches; Switching converters; Switching frequency; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Power Electronics Conference and Exposition, 2005. APEC 2005. Twentieth Annual IEEE
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8975-1
Type :
conf
DOI :
10.1109/APEC.2005.1452914
Filename :
1452914
Link To Document :
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