• DocumentCode
    438381
  • Title

    Making fast buffer insertion even faster via approximation techniques

  • Author

    Li, Zhuo ; Sze, C.N. ; Alpert, Charles J. ; Hu, Jiang ; Shi, Weiping

  • Author_Institution
    Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
  • Volume
    1
  • fYear
    2005
  • fDate
    18-21 Jan. 2005
  • Firstpage
    13
  • Abstract
    As technology scales to 0.13 micron and below, designs are requiring buffers to be inserted on interconnects of even moderate length for both critical paths and fixing electrical violations. Consequently, buffer insertion is needed on tens of thousands of nets during physical synthesis optimization. Even the fast implementation of van Ginneken´s algorithm requires several hours to perform this task. This work seeks to speed up the van Ginneken style algorithms by an order of magnitude while achieving similar results. To this end, we present three approximation techniques in order to speed up the algorithm: (1) aggressive prebuffer slack pruning; (2) squeeze pruning; and (3) library lookup. Experimental results from industrial designs show that using these techniques together yields solutions in 9 to 25 times faster than van Ginneken style algorithms, while only sacrificing less than 3% delay penalty.
  • Keywords
    buffer circuits; integrated circuit design; integrated circuit interconnections; aggressive prebuffer slack pruning; approximation technique; buffer insertion; electrical violation; library lookup; physical synthesis optimization; squeeze pruning; van Ginneken algorithm; Algorithm design and analysis; Communications technology; Contracts; Delay; Libraries; Optimal control; Space technology; Timing; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
  • Print_ISBN
    0-7803-8736-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2005.1466121
  • Filename
    1466121