• DocumentCode
    438432
  • Title

    On structure and suboptimality in placement

  • Author

    Ono, Satoshi ; Madden, Patrick H.

  • Volume
    1
  • fYear
    2005
  • fDate
    18-21 Jan. 2005
  • Firstpage
    331
  • Abstract
    Regular structures are present in many types of circuits. If this structure can be identified and utilized, performance can be improved dramatically. In this paper, we present a novel placement approach that successfully identifies regularity, and obtains placements that are superior to other "general purpose" methods. This method has been integrated into our Feng Shui 2.6 bisection-based placement tool. On experiments with the PEKO benchmarks, our results are within 32% of optimal for both the large and small suites. The largest example, with 2.1 million cells, can be completed in sixteen hours. The majority of our run time is during detail placement-global placement takes under three hours. The success of our method shows that it can find structure, even when the structure was not expected or intended. As part of this work, we have made a number of observations related to the nature of suboptimality in placement. These observations have shown that some neglected research areas have great potential, while problems that receive considerable attention are essentially adequately solved.
  • Keywords
    integrated circuit layout; Feng Shui 2.6; PEKO benchmarks; bisection-based placement tool; placement approach; placement suboptimality; Benchmark testing; Circuit testing; Degradation; Delay; Energy consumption; Integrated circuit interconnections; Minimization methods; Tuned circuits; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
  • Print_ISBN
    0-7803-8736-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2005.1466184
  • Filename
    1466184