DocumentCode
438442
Title
Achieving continuous VT performance in a dual VT process
Author
Agarwal, Kanak ; Sylvester, Dennis ; Blaauw, David ; Devgan, Anirudh
Author_Institution
Michigan Univ., Ann Arbor, MI, USA
Volume
1
fYear
2005
fDate
18-21 Jan. 2005
Firstpage
393
Abstract
In this paper, we present a novel approach to obtain any desired intermediate threshold voltage in a dual VT process. The intermediate threshold voltages are achieved by combining low and high threshold voltages in a device. We show that this combination can be easily implemented in layouts with negligible design and manufacturing overhead. Our results show that power-delay characteristics of the achieved intermediate thresholds match well with the ideal (but impractical) scenario that assumes that all intermediate thresholds are available in the technology.
Keywords
circuit optimisation; integrated circuit design; dual VT process; intermediate threshold voltage; power-delay characteristics; Costs; Energy consumption; FinFETs; Leakage current; Manufacturing; Power dissipation; Power generation; Threshold voltage; Timing; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN
0-7803-8736-8
Type
conf
DOI
10.1109/ASPDAC.2005.1466195
Filename
1466195
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