Title :
A 16 bit 500ks/s 2.7V 5mW ADC/DAC in 0.8um CMOS using error-correcting successive approximation
Author :
Schofield, William G. ; Dedic, Ian J. ; Kemp, Andrew K.
Author_Institution :
Fujitsu Microelectronics Ltd., Berkshire, United Kingdom
Abstract :
An embedded 16 bit ADC/DAC for an analogue signal processor uses error-correcting successive approximation to increase speed by relaxing settling time requirements. Using a low power switched capacitor/resistor shared DAC, it can perform simultaneous A/D and D/A conversion at 500ks/s using 5mW at 2.7V and occupies 2mm2in 0.8µm CMOS.
Keywords :
Bandwidth; Capacitors; Circuits; Clocks; Delay; Error correction; Intelligent networks; Microelectronics; Resistors; Sampling methods;
Conference_Titel :
Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European
Conference_Location :
Southampton, UK
