Novel level-identifying circuit for flash multi-level memories

This paper presents a high-speed, small-area circuit specifically designed levels in the read out operation of a Flash Multi-Level Memory. The analog computation of the Euclidean Distance between the current real cell and the reference currents that represent the different logic version of the circuit has been integrated in a standard double-meta with a die area of only 140 × 100 µm². Operating under a 5V power identifies the read-out current of a memory cell and associates it level in 9 nsec.