Title :
Constructing high level macrocell models using the Shlaer-Mellor method
Author_Institution :
GEC Plessey Semiconductors, Swindon, UK
Abstract :
Shlaer-Mellor is a software engineering method for constructing models of systems. This paper describes how this method was used to construct a high level model of a PCMCIA macrocell. This model is then translated into a C++ implementation using automatic code generation. The paper contrasts the high level model with the hardware implementation of the cell.
Keywords :
Computer interfaces; Computer peripherals; Electrical capacitance tomography; Hardware design languages; Joining processes; Macrocell networks; Master-slave; Object oriented modeling; Software engineering; Testing;
Conference_Titel :
Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European
Conference_Location :
Southampton, UK
