DocumentCode :
439266
Title :
A 600MHz superscalar floating point processor
Author :
Matson, M. ; Badeau, R. ; Clouser, J. ; Dupcak, R. ; Grundmann, B. ; Lamere, M. ; Samudrala, S. ; Allmon, R. ; Fairbanks, N.
Author_Institution :
Digital Equipment Corporation, MA, United States
fYear :
1998
fDate :
22-24 Sept. 1998
Firstpage :
132
Lastpage :
135
Abstract :
The floating point unit of a 600MHz, 60 SpecFP95 (est.), out-of-order, superscalar RISC Alpha micro-processor is described. The unit has two independent pipelines for multiply and add/subtract instructions, and iterative divide and square root circuits. It implements both IEEE and VAX data formats and is fabricated in a 2.2v, 0.35µm CMOS process.
Keywords :
Adders; CMOS process; Circuits; Clocks; Energy consumption; Measurement units; Microprocessors; Pipeline processing; Reduced instruction set computing; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1998. ESSCIRC '98. Proceedings of the 24th European
Type :
conf
DOI :
10.1109/ESSCIR.1998.186226
Filename :
1470983
Link To Document :
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