DocumentCode
439294
Title
A 40MHz CMOS sample&hold operating at 1.2V
Author
Baschirotto, Andrea
Author_Institution
Universita´´ di Pavia, Pavia, Italia
fYear
1998
fDate
22-24 Sept. 1998
Firstpage
248
Lastpage
251
Abstract
A 1.2V 600µW SC double-sampled pseudodifferential Sample&Hold circuit is realized in a standard 0.5µm CMOS technology without using on-chip voltage multiplier. With a 600m Vpp signal at 2MHz using a 40MHz sampling frequency, the S&H exhibits a THD better than -50dB and a CMR better than -40dB.
Keywords
CMOS technology; Feedback circuits; Filters; Frequency; MOS devices; Output feedback; Rail to rail outputs; Sampling methods; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1998. ESSCIRC '98. Proceedings of the 24th European
Type
conf
DOI
10.1109/ESSCIR.1998.186255
Filename
1471012
Link To Document