Signal-transition graph-based design of speed-independent CMOS circuits

This paper presents a design methodology starting from Signal Transition Graphs (STG) for the design of speed-independent CMOS circuits. The starting STG is assumed to satisfy to the Complete State Coding (CSC) property, i.e. to have distinct binary vectors to code the internal states of the STG. The STG is modified by the introduction of supplementary signals to present alternate up and down transitions for the output variables. With some additional rules derived from the properties of negative gates, while using state graphs (SG) and flow tables, it results in race-free implementations containing only negative gates.