• DocumentCode
    439373
  • Title

    A low-voltage energy scalable static differential logic (ES2DL) family

  • Author

    Fahim, A.M. ; Elmasry, M.I.

  • Author_Institution
    University of Waterloo, Ontario, Canada
  • fYear
    1999
  • fDate
    21-23 Sept. 1999
  • Firstpage
    114
  • Lastpage
    117
  • Abstract
    A new logic family, Low-Voltage Energy Scalable Static Differential Logic (ES2DL), is proposed for portable digital signal processing (DSP) applications. ES2DL is capable of operating at supply voltages lower than the minimum of complementary CMOS logic. It achieves low-voltage operation while maintaining high speed of operation by reducing voltage swing and using body bias modulation. A 32-bit carry look-ahead adder (CLA), 8-bit carry-ripple adder (CRA), and a D-type flip-flop (DFF) have been designed and simulated. An ES2DL full-adder is shown to have an energy-delay product (EDP) saving of 2x to 6.5x compared to five other CMOS logic families.
  • Keywords
    Adders; CMOS logic circuits; Digital circuits; Digital signal processing; Dynamic voltage scaling; Energy consumption; Logic circuits; Logic devices; MOS devices; Page description languages;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European
  • Conference_Location
    Duisburg, Germany
  • Type

    conf

  • Filename
    1471109
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=439373