A bootstrapped latched CMOS logic family with demand-on boosting for low-power application

In this paper, a novel bootstrapped CMOS driver, and a low-voltage CMOS logic family using the driver as the output stage, are introduced and analyzed. The proposed driver enhances the driving capability of MOS devices by boosting internal nodes using a single bootstrap capacitor. Hence, the latency is significantly reduced for driving a large capacitive load at low power supply region. Larger boosted voltages of the proposed driver due to no charge loss help further increase the speed. It also minimizes the area overhead by reducing the number of capacitor used. The proposed logic family statistically reduces the power consumption by bootstrapping the driver on demand. The proposed circuits were designed and fabricated using 0.35µm CMOS process technology. The comparison results show that the proposed logic family improves speed up to 42% and reduces the average power consumption by 44% as compared to the conventional CMOS logic family at low power supply region.