DocumentCode :
439452
Title :
ASPRO: An asynchronous 16-bit RISC microprocessor with DSP capabilities
Author :
Renaudin, M. ; Vivet, P. ; Robin, F.
Author_Institution :
TIMA - INPG, Grenoble, France
fYear :
1999
fDate :
21-23 Sept. 1999
Firstpage :
428
Lastpage :
431
Abstract :
This paper describes a CMOS standard-cell Quasi-Delay-Insensitive (QDI) 16-bit asynchronous micro-processor. ASPRO is a scalar microprocessor which issues instructions in-order and completes their execution out-of-order. Designed for embedded applications, it can be customized both at the hardware and software levels to fit specific application requirements. To demonstrate this feature the prototype includes a multiplier-accumulator unit. Fabricated using the STMicroelectronics 0.25µm, 5 metal layers CMOS technology, ASPRO revealed functional at first silicon, and runs at 140 peak MIPS. This project demonstrates that the methodology and the asynchronous logic are mature to design complex and fast fully asynchronous circuits.
Keywords :
Application software; CMOS technology; Digital signal processing; Embedded software; Hardware; Microprocessors; Out of order; Prototypes; Reduced instruction set computing; Software prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European
Conference_Location :
Duisburg, Germany
Type :
conf
Filename :
1471188
Link To Document :
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