DocumentCode
439606
Title
High-performance low-power carry select adder using dual transition skewed logic
Author
Jeong, Woopyo ; Roy, Kaushik ; Koh, Cheng-Kok
Author_Institution
Purdue University, West Lafayette, IN, USA
fYear
2001
fDate
18-20 Sept. 2001
Firstpage
145
Lastpage
148
Abstract
In this paper, we present a low power and high performance Carry Select Adder (CSA) using Dual Transition Skewed Logic (DTSL) suitable for high noise immunity. We compared DTSL Carry Select Adder with domino and static CMOS adders with respect to performance, power consumption and area, using UMC 0.18µm technology. The comparison shows the superior properties of the DTSL over domino and the static CMOS logic: 19% to 27% improvement in power dissipation over domino with similar performance is observed.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2001. ESSCIRC 2001. Proceedings of the 27th European
Conference_Location
Villach, Austria
Type
conf
Filename
1471355
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