DocumentCode :
439626
Title :
Digitally tuneable on-chip line termination resistor for 2.5Gbit/s LVDS receiver in 0.25 µ standard CMOS technology
Author :
Kumric, M. ; Ebert, F. ; Ramp, R. ; Welch, K.
Author_Institution :
Alcatel SEL AG, Stuttgart, Germany
fYear :
2001
fDate :
18-20 Sept. 2001
Firstpage :
241
Lastpage :
244
Abstract :
A 2.5Gb/s 0.25 µm CMOS LVDS compliant receiver with integrated digitally tuneable line termination resistor was developed as a part of MEDEA FONT project (HSI high-speed interfaces WP201) in ST HCMOS7 technology.
Keywords :
CMOS technology; Digital control; Electrical capacitance tomography; Energy consumption; Noise level; Packaging; Resistors; Space technology; Temperature dependence; Tunable circuits and devices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2001. ESSCIRC 2001. Proceedings of the 27th European
Conference_Location :
Villach, Austria
Type :
conf
Filename :
1471378
Link To Document :
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