DocumentCode
439750
Title
A low-power 20-Gb/s CMOS 2:1 multiplexer/driver
Author
Vadipour, M. ; Savoj, J.
Author_Institution
Transpectrum Inc., Los Angeles, CA, USA
fYear
2002
fDate
24-26 Sept. 2002
Firstpage
231
Lastpage
234
Abstract
A 20-Gb/s multiplexer/driver incorporates current steering circuits and a new capacitive peaking technique. The high-speed driver provides a large swing with minimal intersymbol interference. Fabricated in a 0.15-µm CMOS technology, the circuit exhibits a peak-to-peak jitter of 12 ps at 20 Gb/s. The power dissipation is 60 mW from a 1.5-V supply. Simulations confirm achievable operation at 40 Gb/s.
Keywords
CMOS technology; Circuit simulation; Clocks; Driver circuits; High speed optical techniques; Indium phosphide; Inductors; Multiplexing; Optical receivers; Optical transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location
Florence, Italy
Type
conf
Filename
1471508
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