• DocumentCode
    439792
  • Title

    Self-precharging flip-flop (SPFF): A new level converting flip-flop

  • Author

    Mahmoodi-Meimand, H. ; Roy, K.

  • Author_Institution
    Purdue University, West Lafayette, IN, USA
  • fYear
    2002
  • fDate
    24-26 Sept. 2002
  • Firstpage
    407
  • Lastpage
    410
  • Abstract
    Clustered voltage scaling scheme is an effective method of power consumption reduction without performance degradation. One of the main issues in this scheme is performance and power penalties due to insertion of level converting flip-flops at the interface from low-supply to high supply clusters to simultaneously perform latching and level converting functions. A new level converting flip-flop, called Self-Precharging Flip-Flop (SPFF), is proposed that outperforms conventional level converting flip-flops in terms of performance and power-delay product. It is a pulsed flip-flop that employs conditional capturing and self-precharging techniques to efficiently perform latching and level converting functions. Based on simulation results in a 0.25µm CMOS technology, the proposed flip-flop exhibits up to 60% delay reduction and 35% improvement in power delay product as compared to conventional level converting flip-flops.
  • Keywords
    CMOS technology; Circuits; Clocks; Degradation; Delay; Energy consumption; Flip-flops; Latches; MOSFETs; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
  • Conference_Location
    Florence, Italy
  • Type

    conf

  • Filename
    1471551